Recent content by Chilly Willy

  1. C

    TADPCM

    Yes, the decoding of TADPCM would easily fit in the SH2 cache. While it could be written in assembly, the SH2 would be plenty fast enough to use the C code found in the tadpcm2pcm.c decoder file included in the demo. The SH2 can handle any form of ADPCM in real-time for any reasonable sample...
  2. C

    SATNKernel

    Well, let's take a look... an interrupt happens and we get the PC and SR pushed on the stack. The processor fetches the address from the exception table and jumps to it. 8 bytes on the stack at this point. The exception handler pushes one register on the stack, then uses it to disable...
  3. C

    SATNKernel

    I understand completely, I just don't see the problem. So you wind up with (possibly) a few hundred extra bytes being used on the task stack by int handlers. Big whoop. It's not like the Saturn is going to be trying to spawn hundreds of tasks. A typical usage would have at most two or three...
  4. C

    SATNKernel

    The asserted interrupt sets the interrupt mask to its level. Only a HIGHER interrupt can occur, and then only until the mask reaches 7, then only non-maskable interrupts can occur... and there aren't any on the Saturn. At MOST you can have seven nested ints. Not to say exceptions still can't...
  5. C

    SATNKernel

    Yeah, I noticed the similarity to the 68000 right off the bat. They stripped out a number of things they thought weren't needed by embedded applications, most notably super/user state. You have one state in the SH2. But for something like a console where you aren't trying to lock out all...
  6. C

    SATNKernel

    Does not NECESSARILY equal... but I wouldn't be surprised if the author(s) were Amiga programmer(s) in the past. /> /> On the other hand, I WOULD be surprised if they WEREN'T Amiga programmers in the past.
  7. C

    SATNKernel

    Yeah, been checking it out myself... it bares a CONSIDERABLE resemblence to exec.library from AmigaOS. Exec was always the lightest kernel I've ever seen on a PC for what it did. Not claiming anything sinister here - there are worse OSes it could have been influenced by.
  8. C

    SATNKernel

    Fair enough. I didn't think you were, but it never hurts to ask. For the most part, heavy interfaces like X aren't needed for consoles. Kernels aren't either, but this TNKernel looks lightweight enough to be useful on consoles.
  9. C

    SATNKernel

    Great! Haven't gotten around to decompressing the archives yet... was reading docs over at TNKernel to see what this is/does. Any plans to also port nano-x to the Saturn?
  10. C

    SATNKernel

    Nifty! I suppose you worked from the v2.6 code? Some of the ports are a little dated (like the ColdFire port).
  11. C

    is the vdp1 32bits

    True, but irrelevant. It's one of the factors defining a RISC processor - a fixed width opcode. IIRC, the x86 opcode can be up to 96 BYTES in length, but that doesn't make it a 768-bit CPU. The SH2 opcodes are 16 bits wide, but it's a 32-bit RISC chip. Given the fixed width of the VDP1...
  12. C

    Adding SRAM to USB dev cart

    The "problem" is obvious - you tie /BLE and /BHE to ground, so it ALWAYS writes a word, even for byte writes. I would guess that AWR0 is one write strobe, and AWR1 is the other. You're only using AWR0, so you only get one byte valid and overwrite the other byte when you do so as you write a word...
  13. C

    is the vdp1 32bits

    Okay, to simplify it as much as possible almost to the point of irrelevance, VDP1 is 16 bit. All data passing through it is a max of 16 bits wide. I could make an argument that it's really a triple five-bit processor due to how each color channel is processed by its own ALU and all hardware ops...
  14. C

    Pier Solar HD an RPG for XBOX360, PC, Mac, Linux & Dreamcast

    The price from Watermellon is $50. http://www.magicalgamefactory.com/en/factory/shop/ You sometimes see copies on ebay as well, but those are usually the limited first run editions, and they're quite pricey.
  15. C

    is the vdp1 32bits

    You're thinking of GPUs like blitters - if only you double the width of the blit, you increase the fill rate... It doesn't work that way for GPUs. If you look at modern GPUs, they didn't increase the "bits" for processing, they added more pipes. Each pipe handles pixel processing (or geometry...
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