Weird SGL registers

Runik

Staff member
Does anyone knows what the registers at 0x60FFCBC and 0x60FFCBD are for ?

There's a gap in the SGL doc for thoses, and Saturnin keeps looping on them during some games, waiting for a value change ...

If I hack the value the execution continues, but I'd like to know if it's related to an interruption, or anything else ...

Thanks :)
 
It's hard to say for sure, but since they are in RAM and one processor loops on it my best guess would be that they are internal SGL variables for locking memory shared between the master/slave processors (i.e. the loop is waiting for the other CPU to release the shared memory).
 
Interesting idea ... I didn't check if the slave processor was started the first time it occured, but it might be the point.

I'll do some research on it tonight ...

Thanks for pointing this !
 
Running the SGL object files through objdump gives the following:

[ 79](sec -1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x060ffcbc _DMASt_SCU1

[ 80](sec -1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x060ffcbd _DMASt_SCU2
 
Originally posted by antime@Mar 3, 2004 @ 02:46 AM

Running the SGL object files through objdump gives the following:

[ 79](sec -1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x060ffcbc _DMASt_SCU1

[ 80](sec -1)(fl 0x00)(ty 0)(scl 2) (nx 0) 0x060ffcbd _DMASt_SCU2

There are some level 1 and 2 indirect DMA transfers, I guess I'll have to trace the interrupt code for those ...

Thanks for the info :)
 
That's it !

Antime, your indications allowed me to find where was my problem :thumbs-up:

I don't know yet why it's happening, but it's only a matter of time ...

A level 1 DMA interruption is registered but it's never triggered : something prevents it, and it results in an endless loop.

But when this will be fixed, I think a lot more games will show interesting results ;)
 
Well it's too late but it seems you could have found your answer in the structure AD_SGL_WORK in SGL_WORK.h

...

#define Resolution __SGL_WORK->OPTION.Resolution

#define NbPCMBf __SGL_WORK->OPTION.NbPCMBf

#define PCMBufFlag __SGL_WORK->OPTION.PCMBufFlag

#define TrayCheckFlag __SGL_WORK->OPTION.TrayCheckFlag

#define SoundCount __SGL_WORK->OPTION.SoundCount

#define FRT_Count __SGL_WORK->OPTION.FRT_Count

#define SCUMC_ID __SGL_WORK->OPTION.SCUMC_ID

#define DMASt_CPU0 __SGL_WORK->OPTION.DMASt_CPU0

#define DMASt_CPU1 __SGL_WORK->OPTION.DMASt_CPU1

#define DMASt_SCU0 __SGL_WORK->OPTION.DMASt_SCU0

#define DMASt_SCU1 __SGL_WORK->OPTION.DMASt_SCU1

#define DMASt_SCU2 __SGL_WORK->OPTION.DMASt_SCU2

...

or in memory.txt :

060FFC00:

System variable area (GBR register always points to here)

0x400 bytes

System variables are as follows. They can be read from a C program

with the same names (identifiers).

* System Variables:

000: (EventTop) (EVENT *) ; event registered at top

004: (EventLast) (EVENT *) ; event registered last

008: (EventNow) (EVENT *) ; event executing now

00C: (EventCount) (Uint16) ; event remaining

00E: (WorkCount) (Uint16) ; work remaining

010: (MainMode) (Uint8) ; main sequence mode

011: (SubMode) (Uint8) ; subsequence mode

012: (SynchConst) (Sint8) ; video sync count

013: (SynchCount) (Sint8) ; video sync count

014: (UserFunction) (void (*)()) ; user function executed during V-blank

018: (TransCount) (Uint16) ; transfer count during V-blank

01A: (TransRequest) (Uint8) ; transfer request during V-blank

01B: (PauseFlag) (Uint8) ; pause flag for sprites and scroll

01C: (mtptr) (MATRIX *) ; current matrix pointer

020: (MatrixCount) (Uint8) ; matrix nest count

021: (PrintColor) (Uint8) ; color palette for text display

022: (IntCount) (Uint16) ; interrupt count

024: (MsPbufPtr) (Uint32 *) ; vertex coordinate calculation buffer

pointer (Master)

028: (SlPbufPtr) (Uint32 *) ; vertex coordinate calculation buffer

pointer (Slave)

02C: (SpritePtr) (Uint16 *) ; sprite data transfer pointer

030: (MsSdataPtr) (Uint16 *) ; sprite data set pointer (Master)

034: (SlSdataPtr) (Uint16 *) ; sprite data set pointer (Slave)

038: (ZbufPtr) (void **) ; Z buffer pointer

03C: (FormTbl) (TEXTURE *) ; texture data table

040: (SprbufBias) (Uint32) ; sprite data buffer switch

044: (ComRdPtr) (Uint32 *) ; command read pointer

048: (ComWrPtr) (Uint32 *) ; command set pointer

04C: (MsLightVector) (VECTOR) ; light source vector (Master)

058: (SlLightVector) (VECTOR) ; light source vector (Slave)

064: (ColorOffset) (Uint8 *) ; color offset table pointer

068: (MsScreenDist) (FIXED) ; screen position (Master)

06C: (SlScreenDist) (FIXED) ; screen position (Slave)

070: (MsZlimit) (Sint16) ; display limit Z position (Master)

072: (WindowNumber) (Uint8) ; number of windows used

073: (WinUseFlag) (Uint8) ; window use flag

074: (TotalPolygons) (Uint16) ; total polygons calculated

076: (TotalVertices) (Uint16) ; total vertices calculated

078: (MsScreenLeft) (Sint16) ; screen left position (Master)

07A: (MsScreenTop) (Sint16) ; screen top position (Master)

07C: (MsScreenRight) (Sint16) ; screen right position (Master)

07E: (MsScreenBottom) (Sint16) ; screen bottom position (Master)

080: (MsScreenSizeX) (Uint16) ; screen size X (Master)

082: (MsScreenSizeY) (Uint16) ; screen size Y (Master)

084: (MsWindowSizeX) (Uint16) ; window size (Master)

086: (MsWindowSizeY) (Uint16) ; window size (Master)

088: (MXPolygons) (Uint16) ; maximum polygons

08A: (MXVertices) (Uint16) ; maximum vertices

08C: (FrameSizeX) (Uint16) ; frame buffer size

08E: (FrameSizeY) (Uint16) ; frame buffer size

090: (MsWinXAdder) (Uint16) ; window check adder data (Master)

092: (MsWinYAdder) (Uint16) ; window check adder data (Master)

094: (SlWinXAdder) (Uint16) ; window check adder data (Slave)

096: (SlWinYAdder) (Uint16) ; window check adder data (Slave)

098: (MsClipXAdder) (Sint16) ; clipping adder data (Master)

09A: (MsClipYAdder) (Sint16) ; clipping adder data (Master)

09C: (SlClipXAdder) (Sint16) ; clipping adder data (Slave)

09E: (SlClipYAdder) (Sint16) ; clipping adder data (Slave)

0A0: (SlZlimit) (Sint16) ; display limit Z position (Slave)

0A2: (WinPtr) (Uint16) ; window data set offset

0A4: (DispPolygons) (Uint16) ; number of displayed polygons

0A6: (DMAEndFlag) (Uint8) ; DMA end flag (not used)

0A8: (DMASetFlag) (Uint8) ; DMA table set flag

0AA: (PutCount) (Uint16) ; slPutPolygon(),sl...Sprite() call count

0AC: (MsZdpsftcnt) (Uint8) ; screen display limit shift counter (Master)

0AD: (SlZdpsftcnt) (Uint8) ; screen display limit shift counter (Slave)

0B0: (Resolution) (Uint8) ; screen mode

0B1: (NbPCMBf) (Uint8) ; number of PCM buffers (2000H units)

0B2: (PCMBufFlag) (Sint16) ; PCM buffer empty status flag

0B4: (SoundRdCount) (Uint8) ; sound buffer read counter

0B5: (SoundWrCount) (Uint8) ; sound buffer entry counter

0B6: (FRT_Count) (Sint16) ; FRT counter

0B7: (SCUMC_ID) (Uint8) ; SCU memory copy channel number

0B8: (DMASt_CPU0) (Uint8) ; CPU DMA status (CH0)

0BA: (DMASt_CPU1) (Uint8) ; CPU DMA status (CH1)

0BB: (DMASt_SCU0) (Uint8) ; SCU DMA status (CH0)

0BC: (DMASt_SCU1) (Uint8) ; SCU DMA status (CH1)

0BD: (DMASt_SCU2) (Uint8) ; SCU DMA status (CH2)

0BE: (--------) (Uint16) ; system reserved

0C0: (VDP2_TVMD) (Uint16) ; TV screen mode

0C2: (VDP2_EXTEN) (Uint16) ; external signal enable

0C4: (VDP2_TVSTAT) (Uint16) ; screen status

0C6: (VDP2_VRSIZE) (Uint16) ; VRAM size

0C8: (VDP2_HCNT) (Uint16) ; H counter

0CA: (VDP2_VCNT) (Uint16) ; V counter

0CE: (VDP2_RAMCTL) (Uint16) ; RAM control

0D0: (VDP2_CYCA0L) (Uint16) ; VRAM cycle pattern (bank A0, T0_3)

0D2: (VDP2_CYCA0U) (Uint16) ; VRAM cycle pattern (bank A0, T4_7)

0D4: (VDP2_CYCA1L) (Uint16) ; VRAM cycle pattern (bank A1, T0_3)

0D6: (VDP2_CYCA1U) (Uint16) ; VRAM cycle pattern (bank A1, T4_7)

0D8: (VDP2_CYCB0L) (Uint16) ; VRAM cycle pattern (bank B0, T0_3)

0DA: (VDP2_CYCB0U) (Uint16) ; VRAM cycle pattern (bank B0, T4_7)

0DC: (VDP2_CYCB1L) (Uint16) ; VRAM cycle pattern (bank B1, T0_3)

0DE: (VDP2_CYCB1U) (Uint16) ; VRAM cycle pattern (bank B1, T4_7)

0E0: (VDP2_BGON) (Uint16) ; enable screen display

0E2: (VDP2_MZCTL) (Uint16) ; mosaic control

0E4: (VDP2_SFSEL) (Uint16) ; select special function code

0E6: (VDP2_SFCODE) (Uint16) ; special function code

0E8: (VDP2_CHCTLA) (Uint16) ; character control (NBG0, NBG1)

0EA: (VDP2_CHCTLB) (Uint16) ; character control (NBG2, NBG3, RBG0)

0EC: (VDP2_BMPNA) (Uint16) ; bit map palette number (NBG0, 1)

0EE: (VDP2_BMPNB) (Uint16) ; bit map palette number (RBG0)

0F0: (VDP2_PNCN0) (Uint16) ; pattern name control (NBG0)

0F2: (VDP2_PNCN1) (Uint16) ; pattern name control (NBG1)

0F4: (VDP2_PNCN2) (Uint16) ; pattern name control (NBG2)

0F6: (VDP2_PNCN3) (Uint16) ; pattern name control (NBG3)

0F8: (VDP2_PNCR) (Uint16) ; pattern name control (RBG0)

0FA: (VDP2_PLSZ) (Uint16) ; plane size

0FC: (VDP2_MPOFN) (Uint16) ; map offset (NBG0_3)

0FE: (VDP2_MPOFR) (Uint16) ; map offset (rotation parameters A, B)

100: (VDP2_MPABN0) (Uint16) ; map (NBG0 plane A, B)

102: (VDP2_MPCDN0) (Uint16) ; map (NBGO plane C, D)

104: (VDP2_MPABN1) (Uint16) ; map (NBG1 plane A, B)

106: (VDP2_MPCDN1) (Uint16) ; map (NBG1 plane C, D)

108: (VDP2_MPABN2) (Uint16) ; map (NBG2 plane A, B)

10A: (VDP2_MPCDN2) (Uint16) ; map (NBG2 plane C, D)

10C: (VDP2_MPABN3) (Uint16) ; map (NBG3 plane A, B)

10E: (VDP2_MPCDN3) (Uint16) ; map (NBG3 plane C, D)
 
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