```
#define ADD(value)
__asm__ volatile (
"shll16 %0 \n"
"shll8 %0 \n" // placed just before the 32-bit boundary of the register
"shll16 %2 \n"
"shll8 %2 \n" // both _A and value suffer the change
"mov %0,r1 \n" // temp store _A since we need to do add twice
"addc %2,%0 \n" // add with carry. Carry stored in T
"stc sr,r0 \n" // move sr to r0
"and #1,r0 \n" // Put _F 1 if T = 1
"or r0,%2 \n" // Set CARRY flag
"mov r1,%0 \n" // get back the old _A value (we need r0)
"addv %2,%0 \n" // Add again, but this time check for overflow
"stc sr,r0 \n" // move sr to r0
"and #1,r0 \n" // Put _F 1 if T = 1
"shll2 r0 \n" // move the overflow flag to his correct location
"or r0,%2 \n" // Set OVERFLOW flag
"xor r1,r1 \n" // Clears r1, like we do with CISC
"cmp/eq %0,r1 \n" // If _A is zero....
"stc sr,r0 \n" // move sr to r0
"and #1,r0 \n" // Clear all flags but T
"shll8 r0 \n"
"shlr2 r0 \n" // Moves 8-2 = 6 bit positions to the left
"or r0,%2 \n" // OR's that value, 3 flags done (ZERO)
"shlr16 %0 \n"
"shlr8 %0 \n" // Reset all values back 24-bits
"mov %0,r0 \n" // Moves the result into r0 for speed
"and #128,r0 \n" // get the last bit
"or r0,%2 \n" // put the result on F (SIGNAL)
"shlr16 %2 \n"
"shlr8 %2 \n" // both _A and value suffer the change
:"=r" (_A), "=r" (_F)
:"r" (value), "1" (_F), "0" (_A)
)
```