I need some help with an experiment involving the 32X. If somebody has experience writing and running code on it and would be willing to try a simple test (this would be a 1 line modification to something you already wrote) I'd appreciate it - I don't have a flash cart so I can't develop or test a sample program myself.
I've been doing some work on the Sega C2 hardware and have found that the /HSYNC and /VSYNC pins of the VDP can be configured in different modes using bits 6,5 of VDP register $8C:
Bit 6 - /VSYNC control
0 = Normal (Genesis Programming FAQ says it outputs a 60Hz signal, so just regular vertical sync pulses)
1 = Outputs pixel clock (5.36 or 6.71 MHz depending on the display width)
Bit 5 - /HSYNC control
0 = Normal (FAQ says is 16.240 KHz though that doesn't seem right for RS-170 compatible video)
1 = Unknown (Loss of horizontal synchronization in C2 hardware which uses /HSYNC to reset an external pixel counter)
I believe the 32X uses these signals internally, and I'm interested to see what happens to the display when these bits are set individually and in combination. I know the Genesis doesn't use them itself (they go to the cartridge port only).
What I would like somebody to try doing is run any 32X program that displays the 32X bitmap layer, and try changing register $8C to the other settings like $20, $40, $60 and note what happens. Perhaps a full-screen image would be good to identify any display changes rather than just some text - having some difference in pixel priority (using the punch-through priority bit) might also be good in case these bits affect the /YS pin output too.
I seriously doubt any damage could come to your 32X as a result but this would be an at your own risk sort of thing.
Any takers? 😀
I've been doing some work on the Sega C2 hardware and have found that the /HSYNC and /VSYNC pins of the VDP can be configured in different modes using bits 6,5 of VDP register $8C:
Bit 6 - /VSYNC control
0 = Normal (Genesis Programming FAQ says it outputs a 60Hz signal, so just regular vertical sync pulses)
1 = Outputs pixel clock (5.36 or 6.71 MHz depending on the display width)
Bit 5 - /HSYNC control
0 = Normal (FAQ says is 16.240 KHz though that doesn't seem right for RS-170 compatible video)
1 = Unknown (Loss of horizontal synchronization in C2 hardware which uses /HSYNC to reset an external pixel counter)
I believe the 32X uses these signals internally, and I'm interested to see what happens to the display when these bits are set individually and in combination. I know the Genesis doesn't use them itself (they go to the cartridge port only).
What I would like somebody to try doing is run any 32X program that displays the 32X bitmap layer, and try changing register $8C to the other settings like $20, $40, $60 and note what happens. Perhaps a full-screen image would be good to identify any display changes rather than just some text - having some difference in pixel priority (using the punch-through priority bit) might also be good in case these bits affect the /YS pin output too.
I seriously doubt any damage could come to your 32X as a result but this would be an at your own risk sort of thing.
Any takers? 😀
