480p Homebrew Source Code Examples?

slinga

Member
Starting a new thread to not hijack the other one,

Anyone have example source code to set 480p mode?

1) Charles MacDonald has a resolution demo here: Progressive hires test demo?. But it doesn't include source code.
2) MacDonald had an entry in the "C4 - 2006 Context" that is described as "A graphic demo in hires interlaced (or VGA output)". Unfortunately I don't even have the binary for that.

Barring source code I will attempt to RE the resolution demo.
 

stevekwok

New Member
I'm sorry for "hijacking" your another thread

The following are settings for 480p:
1. set HRESO bits of TVMD register to 4(320) or 5(352) for Exclusive Normal Graphic Mode
2. set HRESO bits of TVMD register to 6(640) or 7(704) for Exclusive Hi-Res Graphic Mode
3. set LSMD bits of TVMD register to 0 (Non-interlace) (But i'm curious what will happen if set to other values?)
4. the VRESO bits will be ignored, it doesn't matter what the settings are.
5. Make sure to call SMPC command CHG352 when using 352/704 HRESO
6. For modes 6(640) or 7(704) Exclusive Hi-Res Graphic Mode(or Special High-Resolution Graphics Mode), please reference p.13 for details.
 
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slinga

Member
No need to apologize, the discussion on that thread is fantastic. I didn't want to distract from it.
 

slinga

Member
I spent some time RE-ing mode.iso. I made some progress but I don't have anything displaying on screen: slinga-homebrew/480P-Mode-Demo.

I left out initializing the SMPC as well as a function I called "printfWrapper()". Will get to them when I have more time. Also possible I RE-ed incorrectly.
 

slinga

Member
Spent some more time re-ing, still don't have anything displaying. Not sure what I'm doing wrong. Will go through with a fine tooth comb tomorrow to see what I missed.
 

stevekwok

New Member
Hi, I took a look at your source code
1. D0R, D0W, D0C.., those registers are registers of SCU, have nothing to do with VDP2, make sure you referenced the right document.
2. Step by step. Write a demo that works in the normal resolution first, then extend its functionality to support other resolutions.
 

Ponut

New Member
You also have to keep in mind that SGL constantly performs write-backs on system registers.
If you are going to exact your own modification of them, you need to ensure three things:

1 - The manual does not prohibit the change of these registers when the chip or subsystem is powered on.
2 - The manual describes the state in which the register can be changed or if it can be written to at all.
3 - You must write-back these registers at vblank, basically you're writing back over SGL's write of the register.

The essence of hi-res progressive scan mode is for VDP2.
Instead of vertical stitching of two fields (interlacing), VDP2 performs horizontal stitching of two "fields" ( pixel from A -> pixel from B -> A -> B).
In the hi-res progressive scan mode, the horizontal stitching is of NBG0's pipeline with NBG1's pipeline (they are pointed to the same data as configured by registers).

And as per pg.37 of VDP1's manual, VDP1 is still limited to standard screen sizes in this case (352x240 , 320x240).
 
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slinga

Member
Thank you for the responses. Just to be clear I didn't read the docs, I grabbed MacDonald's mode.iso and started reversing it in Ghidra. I was hoping this would be relatively easy, I was wrong. Ideally I would of just had the original source code to work with.

1. D0R, D0W, D0C.., those registers are registers of SCU, have nothing to do with VDP2, make sure you referenced the right document.
It's certainly possible the names of the registers are wrong. That being said I used the addresses from mode.iso so the addresses they point to should still be correct and what are used in the demo so that shouldn't be the cause of the errors. I will review them again in case some of the addresses I copied over incorrectly.

2. Step by step. Write a demo that works in the normal resolution first, then extend its functionality to support other resolutions.
I agree with you. I was hoping this method would be easier...

You also have to keep in mind that SGL constantly performs write-backs on system registers.
I'm not using SGL. I'm using Jo Engine for it's compiler but I'm not invoking any SGL libraries. I assume mode.iso wasn't built with SGL either and instead MacDonald wrote his own functions to interact with the system. I have RE-ed and reimplemented most of these functions.

The essence of hi-res progressive scan mode is for VDP2.
Instead of vertical stitching of two fields (interlacing), VDP2 performs horizontal stitching of two "fields" ( pixel from A -> pixel from B -> A -> B).
In the hi-res progressive scan mode, the horizontal stitching is of NBG0's pipeline with NBG1's pipeline (they are pointed to the same data as configured by registers).
I've looked through the code and have found only a few places where the 480P rendering differs from the other resolutions. I can't say I've seen where this vertical stitching is happening but I will spend some more time.
 
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