Modifying a 4MB Memory Cart

I was browsing around over at Success-HK when I came across a relatively inexpensive 4MB expansion. It occurred to me that this has just the right amount of RAM for a Genesis devcart. It would lose it's data every time the Genesis was turned off, but if I write the data to the cart using the Genesis itself (with the help of the Sega CD and my little transfer cable) and then just reset the console that shouldn't be a problem. I do have a few questions though.

1. The RAM on the cartridge is DRAM. Is the refresh circuitry provided by the cart, or is it part of the Saturn itself.

2. The cartridge port pinout over at Charles MacDonald's site suggests that the cartridge port has a 16-bit data bus, is that indeed the case?

3. Is there a more complete pinout than what's at Charles MacDonald's site?
 
Originally posted by Mask of Destiny@Wed, 2005-02-16 @ 08:38 PM

1. The RAM on the cartridge is DRAM. Is the refresh circuitry provided by the cart, or is it part of the Saturn itself.
The Saturn performs the refresh.

2. The cartridge port pinout over at Charles MacDonald's site suggests that the cartridge port has a 16-bit data bus, is that indeed the case?
Yes.
 
Is there a more complete pinout than what's at Charles MacDonald's site?

I have a "more complete" one that's based on his document plus some weak guesses rather than actually being able to find a cart that uses them, but aside from that I don't think so. Is there a particular signal you're looking for?
 
It's partially to satisfy my curiousity. I suppose I'm most interested in the pins that aren't labeled with a particular function, just what they're attached to on the PAR. I presume that some of those are the CAS and RAS lines which obviously would be kind of important if I were to try and modify one of these carts.

I might still persue this. I would really like to have a Genesis devcart (or simply a nice RAM expansion for some weird Sega CD stuff). 72-pin SIMMs aren't really appropriate (too wide, 32-bits instead of 16) and 30-pin SIMMs are a bit hard to find these days (we had a whole bunch of them at work at one point, but they've since been thrown away) so one of these carts may be my best bet.

Anyone know where I could pick up a connector that one of these carts would fit in?
 
I only have guesses for CAS and RAS based on the dubious assumption that the DRAM control PAL isn't doing much more than some basic latching/delaying of the signals. If you're interested I can see if I can find my notes.

As for the connector, you might want to look through the catalogs of Hirose, EDAC, and AMP. If memory serves, it should be parallel dual-row 1mm centers and 72 positions (144 positions total). This assumes that you will be getting a single connector and using keying plugs or something for the notch in the cart, however.
 
Originally posted by ExCyber@Thu, 2005-02-17 @ 12:00 AM

I only have guesses for CAS and RAS based on the dubious assumption that the DRAM control PAL isn't doing much more than some basic latching/delaying of the signals. If you're interested I can see if I can find my notes.


Im trying to get a better understanding of how that cart works.Can you post your pinouts?

Ive looked at charles notes and his seem to have some address lines left out and Im thinking that the upper bits for address are connetecd to the PAL

and when they match the address for there repective function and one of the WE/RE lines of the cpu is asserted then the bus of the 74HC transciever is controlled with DIR and OE pins.

$22080000-$220FFFFF : write byte to PC

$22100000-$2217FFFF : read status flag

$22180000-$221FFFFF : read byte from pc

A31 - PAR: PAL16V8 pin 8

A32 - PAR: PAL16V8 pin 11

A33 - CPU A19 / PAR: PAL16V8 pin 7

those three pins must be the only ones able to tell the PAL in the ar when the saturn is accessing the different memory spaces.

Are the D0-D7 or D8-D15 pins hooked directly to the 74hc245?

Im beginning to see how charles said he was able to modify it for some USB. I had limited success using the fx2 to talk to it thru the parallel port. the problem is that the ACK pulse only lasts for a short period of time and it seems that data is valid only on the falling edge. if there was some way for it to hold ACK and the data until the next strobe then it would make much easier protocol. thats the whole problem with using parallel port port with ar is that ACK is short pulse and you simply dont know when its going to occur.

Have you identified some cpu WE, RE lines on the cart and where they goto. I would imagine they would goto the PAL and the pal determines if to enable the 74hc or the RE/WE of the flash chips.

And im wondering if the ACK is gated directly by the PAL from the WE of the CPU since ACK is just a short pulse.

I take it that you could probable desolder the DRAM side of the board and everyhting should work normally, The AR software doesnt rely on DRAM to be present at all does it?

PS: yea my continuity tester really sucks:(
 
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