It could be done without a microcontroller at the cost of lower speed, and there are ways around shrinking the EPROM. On a related note, do you have any decent idea where the A-Bus CS1 signal (the one used for the cart ID region) might be? That could save a chip for a two-device cart and would neatly solve the address space issue. It seems to be connected to the 16V8 in the AR4MP (the input to the diodes that supply the ID code to the data bus is routed over to the 16V8), so I think it might be parts side pin 19 on your pinout (the one marked "MCP: 20V8H pin 27(I 13) / PAR: 16V8 pin 12"). I might test this later, but I need to get caught up on homework first...RockinB said:
Saturn boot cartridge (for Police Officer Smith)
- Thread starter RockinB
- Start date
RockinB said:
yeah, i wasnt thinking about a SD-card at all, too much BS when working with them. instead, i was thinking about a single flash memory IC, like this one. however, can i get a copy of the schematics to your cart and info about making it bootable?
Unless I'm misunderstanding the configuration of that chip (the datasheet is under NDA, and I won't sign an NDA just to sate my curiosity), you would need that and a conventional-interface memory to boot from. Something like M-Systems DiskOnChip or Samsung OneNAND might work, except that their execute-in-place blocks seem to be too small for a Saturn header (4Kbyte).Gravis said:
Making it bootable is mostly a matter of having the appropriate header. It's more or less an edited version of a standard Saturn CD header, and a working example can be found in any Action Replay firmware (if memory serves, the actual user code entry point is at 0xF00 into the cart ROM). There are several in the Tool Downloads thread in the Resources sub-forum here in the Saturn Dev forum. For the meanings of various fields in the header, see Section 4 of "Disk Format Standards Specification Sheet", available in the Saturn Documentation thread.
ExCyber said:
that was an example of high capacity flash chip. there are many different chips available that do not require a NDA. what i need is the specifications of what is required.
ExCyber said:
while im sure some people love scavenging for information, i was hoping to get specifications from someone who actually has made a working version.
Sure; my point is that it's probably an example of a general category that you can't boot from, in light of the fact that you wanted "a single flash memory IC"; the NDA remark was mostly to say that I couldn't be certain of my evaluation.
You can boot from a traditional (ROM/SRAM-like; flat address/data bus and random access, active-low /CE, /OE, /WE), 5V-tolerant (or build a level-shifting interface of some sort), 16-bit memory of at least 4KByte (realistically you'd want more than that, but that's the size of the boot header). For example, the Action Replay and related carts tend to use a pair of AT29C010 or SST29EE010 chips ganged together into a 16-bit memory. The most complete pinout doc is probably Rockin'-B's own (there are a couple of others, but he used them as references), and that should give you a pretty good idea of how they're hooked up. If you're looking for something else, you'll need to be more specific. To the best of my knowledge, nobody here has some kind of "how to make Saturn carts" doc that they're hoarding.
It looks like, from RockinB's pinout, that you have 20 address lines available (A0 - A19). This would be a 1 megabyte (8 megabit) area that you could directly interface to standard memory ICs. But I think anything over that amount would require some extra circuitry (bank switching). Has anyone determined a theoretical maximum amount of memory which could be accessed using the cartridge (without using a cpu/sd card)? Just curious.
Actually, looking at RockinB's pinout again, I think there are some errors.
The pin at location 22, which is titled "CPU A0" is incorrect. I don't think that CPU A0 is present on the connector at all. I think the confusion arises because this pin connects to the A0 pin of the ARP's flash memory chips. But since there are 2 flash chips connected in parallel (for a 16-bit bus), the CPU A0 line would not be used. CPU A1 would connect to the flash memory A0 pins. This is a common way to connect memory to a 16-bit data bus, with the CPU's A0 line being unnecessary.
So basically, every "CPU Ax" line in the pinout diagram needs to be incremented by 1 for it to be correct.
So this increases the amount of memory which can be directly accessed to 2 megabytes (16 megabits).
The pin at location 22, which is titled "CPU A0" is incorrect. I don't think that CPU A0 is present on the connector at all. I think the confusion arises because this pin connects to the A0 pin of the ARP's flash memory chips. But since there are 2 flash chips connected in parallel (for a 16-bit bus), the CPU A0 line would not be used. CPU A1 would connect to the flash memory A0 pins. This is a common way to connect memory to a 16-bit data bus, with the CPU's A0 line being unnecessary.
So basically, every "CPU Ax" line in the pinout diagram needs to be incremented by 1 for it to be correct.
So this increases the amount of memory which can be directly accessed to 2 megabytes (16 megabits).
Those are just the ones that are verified. There are definitely more; AR4MP has mapping for 2Mbit of Flash, 32Mbit of DRAM, and fairly wasteful mapping of the comms registers all without bankswitching, so there must be enough for at least 8Mbyte. The Saturn memory map has 32Mbyte allocated to the A-Bus CS0 space (the usual cartridge RAM/ROM area) and 16Mbyte allocated to the A-Bus CS1 space (the usual cartridge ID area), so there are probably enough address pins for 32Mbyte.gameofyou1 said:
Also, keep in mind that it's a 16-bit bus, so A0-A19 actually gives you 2Mbyte address space. The "CPU Ax" designation is rather misleading; from the software perspective, cartridge A0 is CPU A1 and so on.
edit: looks like you beat me to it on that latter part.
gameofyou1 said:
First, I wasn't sure about that point, too. But with a closer look to the PAR carts, this pin is connected to A0 of both EEPROM chips. So as the A-Bus is a 16-bit bus, it is addressed in words, not bytes. The naming is kind of misleading, since the A-BUS is accessed by the SCU, not the CPU. The Police Officer Smith cart proved that right.
gameofyou1 said:
I tried to guess the location of the other address lines. I assumed that there are actually 25 address line in total. Now this would lead to 64 MByte adressable storage, which would equal CS0 + CS1.
Code:
MCP: 20V8H pin 17(I 12) A21? SLOT_B32(_H73) SCU pin 45
MCP: 20V8H pin 12(I 9) A23? SLOT_B31(_H75) SCU pin 47
PAR: 16V8 pin 6 A20? SLOT_A33(_H72) SCU pin 44
PAR: 16V8 pin 2 A22? SLOT_A32(_H74) SCU pin 46
PAR: 16V8 pin 5 A24? SLOT_A31(_H90) SCU pin 203 next to
Code:
- A-bus: 16bit, 28.63636 MHz / 26.8465875 MHz
-> each cycle: 34,92064 ns / 37,24868 ns
-> CS0: <= 104,762 ns / 111,746 ns
-> CS1: <= 523,810 ns / 558,730 nsExCyber said:
That's true. The SPI-interface to the SD-Cart could be driven from a CPU inside Saturn.
ExCyber said:
Well, what I like about that assumption is, that it is the only spare signal, that I haven't assigned a guessed assignment yet (A20-A24, WE and this here).
Code:
MCP: 20V8H pin 27(I 13) SLOT_B48(_H80) SCU pin 53What about the A24 guessed above, it could maybe be used for CS0/CS1, too. But, maybe even 2 pins are used, since there is CS2 and CS dummy, too.
BTW: what do these high capacity flash chips cost?
Chilly Willy
Established Member
Intel StrataFlash (which is what's used in the MD-Pro flash cart for the MegaDrive) isn't too bad, even from a place like DigiKey:
32 MB (16M x 16) for $12.86 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=877807-ND
16 MB (8M x 16) for $9.75 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=888069-ND
8 MB (4M x 16) for $6.51 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=888137-ND
There's also full documentation available for StrataFlash... no NDAs or anything. This is what I'd use for a cart.
32 MB (16M x 16) for $12.86 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=877807-ND
16 MB (8M x 16) for $9.75 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=888069-ND
8 MB (4M x 16) for $6.51 in single unit quantities: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=888137-ND
There's also full documentation available for StrataFlash... no NDAs or anything. This is what I'd use for a cart.
Chilly Willy said:
Nice! I would think that you could make a pretty awesome arcade-style game with 32megabytes of space.
Also, notice in the datasheet that there is no A0 pin on the flash chips, because they are set up for 16-bit interface. The lowest address pin is A1.
The reason the ARP flash chips have A0 designators is because they are 8-bit devices (with 2 of them in parallel to make the 16-bit interface).
Chilly Willy
Established Member
It's not a 2G chip, but 32 MB would fill the space completely (one address space at least). It would be excellent for development work and homebrew.
Hmmm. Could be a possible 2nd product for Gaming Enterprises to Sell. 
yeah, i was thinking a NAND04GW3B2DN6E may do the trick. sure it's only 512MB but it's close enough.
Chilly Willy
Established Member
Gravis said:
Notice it's a x8 chip - you'd need two of them. Try to look for x16 chips instead.
It can be configured as x8 or x16, but it's only good for mass storage; you'd still need another memory to boot from. However, in some sense it would be a natural expansion of the "half-cartridge" (aside from the cost aspect), because it doesn't actually need to occupy a large address space.
Chilly Willy
Established Member
That's partly why I linked to the StrataFlash - it can be used directly. I guess that's the trade off - size verses being able to use it directly.
AFAIK, the SCU only maps 16MByte for CS1, not 32MByte. Considering the way these regions are named, I don't think an extra address bit is used on the cartridge side to differentiate them; instead I think it's just pre-decoded into a second /CS signal by the SCU.
That A24 doesn't fit the pattern on the SCU side at all. The SCU pinout is very regular apart from supply rails interrupting it, and that pin is squeezed between D0 and something connected to the SMPC, pretty much the exact opposite of where A24 should be. This suggests that it's not another address pin. I think it may be interrupt-related, given its proximity to the CPU-side interrupt signals.
Speaking of SCU's regularity, I did some more digging in everyone's favorite schematic, and I think it's a pretty good bet that:
SLOT_A48 / _H81 / SCU 54 is /CS2 (maybe this is used by some kind of CD block emulator/debugging hardware? Using it for a regular cart is probably the Wrong Thing)
SLOT_B48 / _H80 / SCU 53 is /CS1
